Senior IC Verification Engineer – AR Display (UVM/SystemVerilog)

Snap Inc. is seeking an Integrated Circuit Design Verification Engineer to join the Spectacles Team to verify AR display ICs alongside digital, analog, software, and verification engineers. You will develop UVM-based testbenches, create verification plans, and use Siemens Questa tools. Candidates should have a strong SystemVerilog background, RTL experience, and familiarity with video/display protocols.