Senior ASIC Physical Design Lead — RTL to Tape-out

Quest Global in San Jose, CA seeks a highly experienced Physical Design Manager to lead end-to-end ASIC physical design from RTL to tape-out. The role requires hands-on mastery of advanced-node implementation, timing closure, and sign-off flows. You will drive Place & Route, CTS strategies, and clock-tree design, manage congestion, and mentor engineers to meet aggressive PPA targets. Strong Cadence Innovus experience is mandatory and tape-outs are essential.