High-Speed ASIC Packaging & SI/PI Engineer (2.5D)

Cisco Silicon One in San Jose is seeking an experienced Electrical Engineer to design and validate ultra-high-speed signaling for next-generation ASICs. You will analyze substrate SI/PI, collaborate with layout and system teams, and contribute to post-layout extraction and reporting. The role requires strong background in high-speed design theory, PAM4 SerDes, and SPICE-level circuit analysis, with experience in Cadence Sigrity, Ansys HFSS, and Keysight ADS.