CPU Verification Contract

Key responsibilities: Own verification plans, testbench architecture, and signoff Develop System Verilog/UVM environments, sequences, scoreboards, and checkers Verify PCIe, Ethernet, CPU integration, interconnects, and switches Run regressions, track coverage, and debug failures Set up verification flows for new programmes Use AI-assisted tools for test generation, debug, and coverage closure Work directly with customer design and verification teams Key experience required:6+ years of hands-on Design Verification experience Multiple production tapeouts Strong System Verilog and UVM experience Experience with Arm CPU clusters, interconnects, PCIe, Ethernet, or CPU/subsystem integration Strong debugging and verification skills Ability to work independently in fast-paced environments Desirable experience: Formal verification and SVA, Using Jasper GoldAMBA, PCIe, or Ethernet VIPEmulation or hardware-accelerated simulation Consulting or contract engineering experienceAI-assisted verification tools If you are interested and would like further information, please contact Chase Jacobs at IC Resources.