Senior ICE Emulation Design Engineer

Responsibilities: Partition and synthesize large SOC RTL designs for emulation. Integrate internal and third-party IPs for emulation compatibility, resolving timing and connectivity issues. Setup and validate high-speed and low-speed interfaces. Configure host servers and boot environments to interact with the emulated design. Integrate, develop, and debug transactors, bridges, and protocol adapters as needed. Debug and root-cause embedded hardware, software, and test failures in emulation. Collaborate with RTL, DV, and SW teams to resolve system-level bugs.

Qualifications: BS or MS degrees or higher in Electrical Engineering, Computer Engineering, or related fields. 7+ years of hands-on experience in prototyping, emulation, SOC design, and validation. Self-driven with strong problem-solving and communication skills. Experience integrating and debugging high-speed and low-speed interfaces. Familiarity with embedded software bring-up and bootloader/kernel interactions.

Skills: Proficiency with scripting languages (Python, Perl, TCL) for automation. Experience in design verification and hardware/software co-simulation. Knowledge of Linux device drivers, bare-metal firmware, or boot loaders. Tell us what you're building and we'll recommend qualified vendors for your project. ASIC Design Services Verification Packaging & Wafer Semiconductor IP Find the Right Semiconductor PartnerTell us what you're building and we'll recommend qualified vendors for your project. ASIC Design Services Verification Packaging & Wafer Semiconductor IP Work EmailFree No obligation Response within 24 hours