Senior Physical Design Engineer: Timing, PPA & Flows
consensusSan Jose, CA
Senior Physical Design Engineer: Timing, PPA & Flows
L6
consensusSan Jose, CA2 days ago
Industries
Semiconductor and Related Device ManufacturingPrinted Circuit Assembly (Electronic Assembly) ManufacturingResearch and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)Etched is looking for exceptional Physical Design engineers to join our team in San Jose. In this role you will own block-level implementation and verification, drive timing closure and PPA optimization, supervise 3rd party design work, and help improve our design flows and iteration speed.
You will collaborate with RTL designers, push automation, and develop dashboards that monitor project convergence. We seek deeply creative engineers comfortable working in a fast-paced startup environment.
Apply now
Level
LeadL6
Location
San Jose, CA
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
2 days ago
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