Hybrid SRAM Design Engineer — Next-Gen Memory Architectures

L6

jobleadsusSan Jose, CAtoday
TSMC Technology, Inc. in San Jose is seeking a hands-on SRAM Design Engineer to advance SRAM compilers and memory architectures for cutting-edge SoCs. You will work closely with architecture teams to optimize PPA and drive silicon bring-up, testing, and post-silicon analysis. The role requires advanced degrees with significant industry experience in SRAM design, compiler development, and layout for sub-7nm nodes, plus scripting skills to automate flows.
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Apply now

Level

LeadL6

Location

San Jose, CA

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

today

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