SoC Physical Design Engineer: Netlist-to-Tapeout Impact

Apple Inc. in Austin, TX is seeking a Physical Design engineer to drive the netlist-to-tapeout flow for complex SOC partitions. You will collaborate with architecture, CAD, timing and logic design teams to meet schedule and design goals. Responsibilities include timing, physical and electrical verification, GDS2 implementation, and driving signoff closure while continually improving design flows and addressing issues across the partitioning process.