Senior High-Speed Analog/Mixed-Signal Designer (DDR/IP)

Monolithic Power Systems, Inc. in San Jose, CA is seeking a memory design engineer to define, specify, simulate and implement DDR/LPDDR IPs and related high-speed circuits. The role centers on analog and digital block design, architecture coordination, and pre-silicon verification. You will own design, simulation, and characterization of high-speed blocks, collaborate with system teams, mentor junior engineers, and contribute to development flows while driving test plans and silicon bring-up.