Senior Analog Timing Designer – High-Performance ICs
L5
ipro networks pteTempe, AZyesterday
Occupations
Electronics Engineers, Except ComputerComputer Hardware EngineersTiming Device Assemblers and AdjustersIndustries
Semiconductor and Related Device ManufacturingOther Electronic Component ManufacturingPrinted Circuit Assembly (Electronic Assembly) ManufacturingIntellipro in Tempe, AZ is seeking an Analog Designer – Timing to join the timing product development team for high-performance networking and data center applications. This full-time, on-site role offers the chance to work on novel timing products with a talented team.
You will design mixed-signal modules, contribute from definition to release, and mentor layout engineers. A MSEE with 3+ years and hands-on Cadence Spectre/AMS experience are required; knowledge of PLL, phase noise, and 65nm CMOS
Apply now
Level
SeniorL5
Location
Tempe, AZ
Occupation
Electronics Engineers, Except Computer
Industry
Semiconductor and Related Device Manufacturing
Posted
yesterday
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