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Senior SerDes Bring-Up Validation Engineer

L6

astera labsSan Jose, CA5 days ago
Astera Labs is seeking a Principal SerDes Bring-up Validation Engineer in San Jose, CA to lead end-to-end post-silicon bring-up, validation, and characterization. You will own bring-up strategies, translate requirements into test objectives, pass/fail criteria, and schedules while guiding hands-on lab work to verify silicon against specifications. You will collaborate with AMS design, firmware, and system teams to build automated test frameworks, debug analog and digital interactions at the
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Level

LeadL6

Location

San Jose, CA

Occupation

Validation Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

5 days ago

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