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CPU Timing Engineer: Automation & STA Signoff

L6

qualcommSanta Clara, CAyesterday
Qualcomm Technologies, Inc. is seeking a CPU Physical Design Timing Engineer to define, develop and drive CPU timing closure for Oryon CPU Cores. You will collaborate with RTL teams to meet aggressive power, area and performance targets using industry standard tools. You will script and automate STA signoff workflows with TCL/Perl/Python, run PrimeTime/Tempus, and investigate timing miscorrelations across PVT conditions, contributing to multi-project PPA goals and professional growth in a
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Level

LeadL6

Location

Santa Clara, CA

Occupation

Validation Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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