CPU Verification Engineer Design Verification Austin / Santa Clara / Markham · Hybrid

Nuvacore is building a ground-up high performance, low-power CPU for next-generation compute workloads. We are seeking Verification Engineers atmultiple levels— from Senior Engineer to Principal level — to help prove the correctness of the Nuvacore CPU. As part of thedesign verification (DV) team, you will help verify by building the test plans, environments, and checkers that find deep bugs in the pipeline long before silicon, working shoulder-to-shoulder with architecture and RTL design. THE ROLEPlan & Strategy: Drive the verification scope, strategy, and test plans for the CPU at unit and/or top level of the CPU design. Environment Setup: Build, maintain, and scale robust verification environments — stimulus generators, checkers, transactors, and coverage — that exercise the pipeline end to end. Test & Debug: Generate complex directed and random tests in assembly, C, or random instruction sequences (RIS) to expose corner cases such as speculation, hazards, flushes, and retirement ordering. Performance Verification: Partner with architects to correlate RTL against performance models, hunting throughput, stall, and branch-prediction-accuracy issues. Coverage Closure: Define the coverage space, write functional coverage monitors, and analyze metrics to prove the test plan is complete. Cross-functional Collaboration: Partner with architecture and RTL teams to root-cause failures, drive design fixes, and support emulation, FPGA, and silicon bring-up.