Senior SoC Lead: Chiplet Architect & Tapeout Leader
jobleadsusSan Jose, CA
Senior SoC Lead: Chiplet Architect & Tapeout Leader
L6
jobleadsusSan Jose, CAyesterday
Occupations
Computer Hardware EngineersElectronics Engineers, Except ComputerArchitectural and Engineering ManagersIndustries
Semiconductor and Related Device ManufacturingOther Electronic Component ManufacturingPrinted Circuit Assembly (Electronic Assembly) ManufacturingLattice Semiconductor is seeking a Senior SoC Chip Lead for our San Jose office. You will own chip tapeout, drive architecture decisions, and lead cross-functional teams across multiple sites to accelerate development of next-generation SoCs.
Qualifications include:
20+ years in FPGA/SoC design, expert SystemVerilog and SSTA skills, and a proven track record of delivering tapeouts. This role emphasizes leadership, architecture influence, and strategic roadmap planning.
Apply now
Level
LeadL6
Location
San Jose, CA
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
yesterday
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