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SoC Design Verification Engineer

L6

virtual vocationsDenver, CO4 days ago
To support the complete verification of innovative System-on-Chip (SoC) designs, the full-time SoC Design Verification Engineer will develop verification plans, create testbenches, and ensure design quality and functional correctness in a remote work environment.
Key responsibilities: Develop and execute verification plans for complex SoC digital designs Create and maintain UVM/SystemVerilog based testbenches and environments Perform functional coverage analysis and drive bug closure through regression runs
Required qualifications: Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering (or related field) 5+ years of hands-on experience in ASIC/SoC design verification Strong proficiency in SystemVerilog, UVM, and simulation tools (e.g., Xcelium) Solid understanding of digital design fundamentals and RTL design Experience with scripting and programming languages (Python, Perl, TCL, C/C++)
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Apply now (opens in a new tab)

Level

LeadL6

Location

Denver, CO

Occupation

Validation Engineers

Industry

Computer Systems Design Services

Posted

4 days ago

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