Head of Wearable SoC Analog Design

Ixana is seeking an experienced IC design leader to architect next‑generation Wi‑R SoCs and guide mixed-signal teams across West Lafayette and remote sites. You will own end‑to‑end tape-outs, IP reuse strategies, and silicon validation, collaborating with product and firmware to optimize system performance. The ideal candidate has 15+ years in ASIC/SoC design with multiple tape-outs and deep low‑power wireless experience, plus Cadence proficiency and leadership skills.