Senior Physical Design Engineer for AI/ML ASICs (Hybrid)

L6

tenstorrentSanta Clara, CAyesterday
Tenstorrent is seeking a mid- to senior-level Physical Design Engineer to contribute to the physical design of high-performance chips for industry-leading AI/ML architectures, spanning implementation from synthesis through tapeout. You will partner with front-end and physical design engineers to optimize floorplanning, timing, power, and area across multiple IPs, building ASIC expertise along the way.
Apply now
Apply now

Level

LeadL6

Location

Santa Clara, CA

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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