Senior RFIC Design Engineer — CMOS & Analog Blocks

L6

manpowergroupSan Jose, CAyesterday
Manpower Group is seeking a Principal RFIC Design Engineer IV for our client in the San Jose area. The role involves leading RF/analog IC design from transistor-level architecture to module-level implementation in a hybrid WD schedule (3 days onsite, 2 WFH) with potential for remote-US candidates aligned to PST hours. Open to relocation if converted to FTE, and a 6-month assignment with intent to convert to full-time based on performance and business needs.
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Level

LeadL6

Location

San Jose, CA

Occupation

Electronics Engineers, Except Computer

Industry

Other Electronic Component Manufacturing

Posted

yesterday

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