Senior ASIC Design Engineer - Optics & High-Speed SoCs

Ayar Labs is seeking an ASIC Sr. Staff Engineer to lead design, bring-up and debug of complex digital subsystems in an electro-optical SoC. You will work in a small IC design team, hands-on and independent, delivering clear specifications and robust RTL. You will collaborate with analog, photonics and firmware engineers, develop testbenches, verify with XCelium/VCS/Questa, and drive timing signoff across multiple clock domains in high‐speed interconnects and optics.