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Principal Electrical Engineer - FPGA Verification Jobs

L6

clearanceTewksbury, MAtoday

Occupations

Electronics Engineers, Except ComputerElectrical EngineersComputer Hardware Engineers

Industries

Research and Development in the Physical, Engineering, and Life SciencesSearch, Detection, Navigation, Guidance, Aeronautical, and Nautical System and Instrument ManufacturingEngineering Services
Principal Level Electrical Engineer The Radar Digital Products (RDP) Department at Raytheon is seeking an experienced Principal level Electrical Engineer to verify FPGA based designs for control and/or signal processing radar applications. This position can be for the Tewksbury, MA location or the Marlborough, MA location.
What You Will Do:
  • Own or contribute to the successful completion of FPGA-based designs, on time and on budget
  • Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage using UVMCreate complete documentation including verification plan and report
  • Demonstrate self-motivation, with little supervision required
  • Work cooperatively with systems, hardware, software engineers, and program management to ensure product success
  • Support internal and external technical reviews
  • Qualifications You Must Have
  • Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 8 years of prior relevant experience
  • Digital design verification
  • Strong proficiency in System
  • Verilog for both design and verification (interfaces, clocking blocks, assertions)
  • Hands-on experience building UVM-based testbenches from scratch, including env, agent, scoreboard, and coverage components
  • Solid understanding of constrained-random verification and functional coverage methodology
  • Familiarity with AXI, PCIe, Ethernet, DDR protocols.
  • Experience with industry-standard simulators (e.g., Questa, VCS, Xcelium)
  • Experience with regression management and debug of complex, intermittent failures
  • Ability to develop and maintain verification plans tied to design specifications and coverage closure criteria
  • Experience with version control systems (e.g., Git, ClearCase, SVN) in a team-based development environment
Qualifications:
  • We Value
  • Proficiency with Git. Branching strategies, pull requests, and collaborative workflows
  • Experience with UVMF (UVM Framework) for structured, reusable testbench development
  • Familiarity with Vivado and Quartus FPGA simulation flows
  • Experience with scripting languages (Python, Tcl, Perl) for test automation and tooling
  • Experience designing FPGAs using VHDLFamiliarity with SLURM workload manager for job scheduling and compute cluster resource management
  • Prior experience mentoring junior verification engineers
  • Existing DoD security clearance
Apply now (opens in a new tab)
Apply now (opens in a new tab)

Level

LeadL6

Location

Tewksbury, MA

Occupation

Electronics Engineers, Except Computer

Industry

Research and Development in the Physical, Engineering, and Life Sciences

Posted

today

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