ASIC Power Engineer

Posted: 2026-01-14

Location: Sunnyvale, CA

Salary: USD 160-170 / Yearly (Full Time)

Employment Type: Full Time

Client: TechMContact: Meghana Gorusu

Company: SRI Tech Solutions

Role: ASIC Power Engineer

Location: Sunnyvale, CA (Hybrid)

DUTIES: ASIC Power Engineer to perform power analysis and optimizations in ASIC for Client's AR/VR products. Areas of interests includes Machine Learning. Primary languages are Python, tcl and System Verilog.

RESPONSIBILITIES: Perform PPA optimization with Fusion compiler. Perform RTL and netlist level Power analysis Perform post-processing and scripting on report log files for format conversion, data analysis and information extraction Setup, run, debug and analyze reports of ASIC flows (Synthesis, PD, Power, Timing) Implement some blocks at RTL and UPFAbility to document and communicate clearlyMINIMUMQUALIFICATIONS:10+ Years of experience as an ASIC Power engineer, or CAD Engineer/Physical Design engineer Experience with power estimation tools and synthesis, some physical design Knowledge of power trade-offs in design and back end implementation Hands-on experience in scripting, data analysisBS in Electrical Engineering/Computer Science or equivalent experiencePREFERREDQUALIFICATIONS:Synopsys (DC, ICC, PTPX/PrimePower, VCS, Verdi) and/or Cadence (Joules) Python, Perl (or similar) scripting and data-post-processing tools Excel (or Matlab) for model fitting, data visualization and analysis Experience in low power design, tools and methodologies including power intent UPF specificationsSilicon Power Characterization Some power profiling experience at IP/SoC level Must have

Skills: Some power profiling experience at IP/SoC level