Senior SoC Verification Engineer - ML Acceleration

Annapurna Labs (U.S.) Inc. in Austin, TX is seeking experienced Design Verification Engineers to verify SOC designs and drive testbench development for next-gen cloud server chips. You will integrate 3rd party IPs, create test plans, and maintain regression infrastructure. Ideal candidates have 8+ years in SystemVerilog/UVM verification, strong C/C++, Python, and memory/subsystem exposure, with a passion for scalable silicon in a dense data-center environment.