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ASIC Design Engineer

L6

mirafra technologiesSanta Clara, CA2 days ago
Mirafra Technologies in Santa Clara, CA is seeking a senior RTL engineer to translate system requirements into robust microarchitectures and drive HW/SW co-design across AI workloads and memory systems. You will collaborate with software teams to define programming models, interfaces, and data movement, while leading RTL implementations and architecture reviews to meet performance and power targets.
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Apply now (opens in a new tab)

Level

LeadL6

Location

Santa Clara, CA

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

2 days ago

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