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Senior Analog Design Engineer, High-Speed CMOS/RF

L6

neurophosSan Mateo, CAyesterday
Neurophos, Inc. seeks a seasoned Principal Analog Design Engineer to drive the full-custom analog front-end for our photonics-enabled AI platform. You will own transistor-level design, verification, and tape-out-ready layouts, advancing GHz-speed circuits from concept to production. Location options include Austin, TX; Sunnyvale, CA; or Hsinchu, Taiwan. This full-time on-site role offers opportunities to impact core electronics and collaborate with photonics and digital teams.
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Apply now (opens in a new tab)

Level

LeadL6

Location

San Mateo, CA

Occupation

Electronics Engineers, Except Computer

Industry

Other Electronic Component Manufacturing

Posted

yesterday

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