Senior Staff Clock Architect for Ultra-Low-Skew SoCs

L6

7rays semiconductorsSan Jose, CAyesterday
7Rays Semiconductors in San Jose, California, is seeking a Senior/Staff Physical Design Engineer with deep expertise in top-level clock architecture and CTS implementation for advanced-node SoCs (5nm / 3nm / 2nm). The ideal candidate will have strong experience in designing large-scale clock distribution networks while collaborating with various teams to ensure robust clock quality and tapeout readiness.
Apply now
Apply now

Level

LeadL6

Location

San Jose, CA

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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