Senior Physical Design Engineer – 5nm/ASICs, On-Site SJ
etchedSan Jose, CA
Senior Physical Design Engineer – 5nm/ASICs, On-Site SJ
L6
etchedSan Jose, CAtoday
Industries
Semiconductor and Related Device ManufacturingResearch and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)Electronic Computer ManufacturingA tech-focused company in San Jose is seeking exceptional Physical Design engineers to own block-level implementation and verification. Responsibilities include driving timing closure and PPA optimization, collaborating with RTL Designers, and supervising design flow improvements. Ideal candidates will have 5-10+ years of experience in physical design and familiarity with advanced design tools. Join a fully in-person team and enjoy comprehensive benefits, including a generous housing subsidy and health packages.
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Level
LeadL6
Location
San Jose, CA
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
today
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