Lead Analog IC Designer SerDes & 7nm Focus

L6

cadence design systemsSan Jose, CA5 days ago
Cadence Design Systems seeks an experienced Lead Analog IC Designer to drive the design and development of analog/mixed signal blocks from concept through verification. Candidates should have 3+ years in CMOS Ser Des or high-speed I/O, with strong CAD tool proficiency and a track record in advanced node design. The role offers a competitive salary in California, eligibility for incentive compensation, and comprehensive benefits.
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Level

LeadL6

Location

San Jose, CA

Occupation

Electronics Engineers, Except Computer

Industry

Semiconductor and Related Device Manufacturing

Posted

5 days ago

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