Director of Power Packaging Engineering (SiP/WLP)

L7

renesasPhoenix, AZyesterday
Renesas is seeking a seasoned packaging engineer to lead Package Technology Development/NPI and R&D for AI/datacenter power packaging, including Smart Power Stages, vertical power stages and power modules. The role focuses on wafer‑level, flip‑chip and multi‑chip module concepts with OSAT/CM coordination. You will collaborate with Product, Quality and Operations to define processes, qualify new packages, and drive ramp‑up and production controls.
Apply now
Apply now

Level

ManagerL7

Location

Phoenix, AZ

Occupation

Electronics Engineers, Except Computer

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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