Senior Mask Design Engineer - Submicron CMOS, Cadence

NVIDIA is seeking a Senior Mask Design Engineer to contribute to package layouts and interposers. You will work with cross‑functional teams to deliver optimized layouts under tight schedules, leveraging Cadence Virtuoso and advanced verification tools. You should have a BS in Electrical Engineering and 3+ years of mask and layout experience, with a strong grounding in submicron CMOS layouts and DRC/LVS processes. NVIDIA offers equity and comprehensive benefits.