Senior Chip Design Architect: AI-Driven Physical Flow

Ricursive Intelligence is seeking a senior physical design engineer to own the RTL-to-GDSII flow end-to-end, from synthesis to tapeout, in a small, rapidly evolving team. You will drive timing, power, and signoff for complex blocks at advanced nodes, integrate AI-driven tooling, and build Python/Tcl automation while collaborating with RTL, DFT, and foundry groups. This role shapes how our self-improving design models learn from silicon results.