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Senior ASIC DFT Engineering Lead

L6

cisco systemsSan Jose, CAyesterday
Cisco Systems, Inc. is seeking an ASIC Implementation Technical Lead focused on Design-for-Test within the Silicon One team. You will work with Front-end RTL and backend physical design teams to define DFT requirements early in the design cycle and help craft next‐generation networking chips. You will drive DFT and quality processes through the implementation flow and post-silicon validation, with exposure to signoff activities and collaboration with ATE engineers on pattern translation.
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Apply now (opens in a new tab)

Level

LeadL6

Location

San Jose, CA

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

yesterday

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