Principal Mixed-Signal Verification Leader

L6

allegro microsystemsRichardson, TX9 days ago
Allegro Micro Systems is seeking a Principal Mixed-Signal Design Verification (MSDV) Engineer & Team Lead to drive the verification of next-gen Power ICs, including motor drivers and PMICs. You will lead a verification team from planning to tape-out sign-off. The role requires 8+ years in MSDV, expertise in System Verilog/UVM/SVA, and strong background in power topologies. You will collaborate with design and systems teams, build scalable testbenches, and advance automation in a global
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Level

LeadL6

Location

Richardson, TX

Occupation

Electronics Engineers, Except Computer

Industry

Semiconductor and Related Device Manufacturing

Posted

9 days ago

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