Senior Staff Digital Systems & Emulation Engineer

Key Responsibilities: Emulation & FPGA DevelopmentArchitect, develop, and maintain FPGA-based emulation platforms for advanced digital power controllers and mixed-signal power-management products. Map and integrate production or representative RTL into FPGA/emulation environments for pre-silicon feature development and validation. Develop reusable FPGA infrastructure, interfaces, test capabilities, and debug methodologies supporting multiple product generations. Develop and improve build, configuration, automation, and debug flows to make emulation environments accessible and repeatable across engineering teams. Support integration of FPGA/emulated controllers with real power stages, loads, instrumentation, and system‑level hardware. Identify differences between ASIC and FPGA implementation and develop appropriate strategies to maintain meaningful system‑level behavior and correlation. Digital Systems & RTLUnderstand and contribute to digital system architecture, microarchitecture, and RTL implementation where required. Analyze timing, latency, clock-domain, interface, datapath, and real-time execution requirements relevant to system behavior. Develop or modify synthesizable RTL blocks required for emulation, instrumentation, prototyping, and architectural exploration. Support integration and debug of digital interfaces, ADC/DAC data paths, PWM generation, telemetry, protection functions, state machines, and embedded control logic. Work with Digital Design and Verification teams to correlate behavior between behavioral models, RTL simulation, emulation, and silicon. DSP & Control Algorithm ImplementationSupport implementation and evaluation of digital control and signal‑processing functions used within power‑management systems. Translate mathematical or system‑level algorithms into practical fixed‑point and real‑time digital implementations. Evaluate effects of sampling rate, latency, quantization, numerical precision, filtering, and computational architecture on system performance. Implement and evaluate digital filters, signal conditioning, control‑loop functions, and related DSP algorithms where required. Collaborate with system architects to rapidly prototype new algorithms before committing them to production RTL. System-Level ValidationDevelop system‑level emulation scenarios representing realistic customer use cases and operating conditions. Define measurable pass/fail criteria and validation methodologies for new architectural features. Correlate emulation results with simulation, behavioral models, bench measurements, and silicon measurements where available. Support pre‑silicon validation of control‑loop behavior, transient response, telemetry, protection mechanisms, sequencing, communication interfaces, and other system‑level functions. Perform detailed debug across hardware, RTL, firmware, and system boundaries to identify root causes of complex issues. Methodology & Technical LeadershipDefine and improve methodologies for FPGA prototyping and emulation of mixed‑signal and digitally controlled power systems. Develop reusable architectures, automation, scripts, and engineering workflows that reduce setup and debug time. Participate in architecture, design, and verification reviews and provide technical guidance on emulation feasibility and implementation trade‑offs. Work independently on complex technical problems and drive issues to resolution across organizational boundaries. Mentor engineers in FPGA, digital design, emulation, and system‑debug techniques. Document architecture, implementation, test methodology, limitations, and results to enable reuse across programs. RequiredBachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline. 10+ years of relevant industry exper