Senior Front-End Design Automation Engineer - RTL & Verification

L6

alteraSan Jose, CAyesterday
Altera is seeking a Senior Design Automation Engineer to join our Design Methodology, Automation and Infrastructure Team. This role focuses on building and maintaining core automation infrastructure that supports FPGA design flows—from RTL to GDSII—and accelerating development cycles for next‑generation FPGA products. You will develop automation flows, create scripts, evaluate EDA tools, and partner with design and verification teams to drive scalable, reliable solutions and continuous
Apply now
Apply now

Level

LeadL6

Location

San Jose, CA

Occupation

Computer Hardware Engineers

Industry

Computer Systems Design Services

Posted

yesterday

To get sharper similar jobs, create your profile using the link below.

Create profile