Global Director, Ultra-Low Power ASIC Physical Design
nokiaSan Jose, CA
Global Director, Ultra-Low Power ASIC Physical Design
L7
nokiaSan Jose, CA8 days ago
Occupations
Computer Hardware EngineersElectronics Engineers, Except ComputerArchitectural and Engineering ManagersIndustries
Semiconductor and Related Device ManufacturingResearch and Development in the Physical, Engineering, and Life Sciences (except Nanotechnology and Biotechnology)Semiconductor Machinery ManufacturingNokia seeks an experienced Director of ASIC Physical Design to strategically lead global physical design engineering teams. Drive end-to-end PD from RTL to GDSII with emphasis on ultra-low power and PPA on latest nodes.
Define advanced methodologies and manage multi-site teams across USA, India, and Italy to ensure first-pass silicon success. The candidate will mentor teams, implement Customer Owned Tooling flows, optimize flows for new processes, and collaborate with architecture, RTL, CAD, and
Apply now
Level
ManagerL7
Location
San Jose, CA
Occupation
Computer Hardware Engineers
Industry
Semiconductor and Related Device Manufacturing
Posted
8 days ago
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