Senior ASIC Netlisting & Physical Design Engineer

NVIDIA in Austin is seeking a Senior ASIC Physical Design Engineer, Netlisting, to drive high-frequency and low-power block- and full-chip netlisting activities. You will tackle equivalence checking, clock-domain crossing, MTBF analysis, and contribute to timing convergence and ECO implementation. The role requires a BS or MS in EE/CE with 5+ years of experience, hands-on RTL/logic design, and proficiency with standard EDA tools. Equity, benefits, and a competitive base salary are offered.