Senior CPU Subsystem Verification Engineer - UVM/SoC Expert

ALTEN in San Jose, CA seeks an experienced verification engineer to verify CPU subsystems and SoC interfaces using SystemVerilog/UVM. You will develop testbenches, plans, assertions, and functional coverage while collaborating with Architecture and RTL teams. The role requires strong scripting skills (Python/Perl/Shell) and hands-on experience with verification IP integration, AXI/AMBA interfaces, and regression cycles. On-site position in Silicon Valley with potential for long-term impact.