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Lead DFT Architect for Next-Gen AI Chips

L6

sambanovaSan Jose, CA18 days ago
SambaNova Systems is seeking a Principal Design for Test (DFT) Engineer to help build state-of-the-art RDU chips for ML/AI. You will own DFT architecture, verification, ATPG, MBIST and silicon bring-up for high-performance chips. Responsibilities include defining DFT for large SoCs, maintaining ATPG flows, automating DFT tasks, and integrating JTAG/IJTAG interfaces for test access. Collaboration with STA and PD teams is required to meet timing closure and yield goals.
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Apply now (opens in a new tab)

Level

LeadL6

Location

San Jose, CA

Occupation

Computer Hardware Engineers

Industry

Semiconductor and Related Device Manufacturing

Posted

18 days ago

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